Extreme Ultraviolet Lithography
Leading the EUV Race
Samsung Foundry has completed all the steps necessary to manufacture wafers using extreme ultraviolet (EUV) lithography. Samsung Foundry is in mass production with 7nm EUV and has started risk production at 5nm EUV.
Performance Increase vs 10nm
Power Reduction vs 10nm
Area Reduction vs 10nm
Compared to 7LPP, Samsung’s new 5nm EUV process allows up to a 25 percent increase in logic area efficiency with 20 percent lower power consumption or 10 percent higher performance as a result of process improvement to enable more innovative standard cell architecture. The journey to 7nm EUV started in 1986 – see how we got here.
Hiroo Kinoshita of NTT Japan publishes a paper on the feasibility of extreme ultraviolet (EUV) lithography.
Bell Labs forms a team to work on EUV lithography.
The first reflective EUV masks are fabricated.
Sandia Laboratories develops a potential EUV light source, using a 150-watt krypton fluoride excimer laser.
The U.S. Energy Dept. (DOE) contributes $12.6 million to a collaborative EUV R&D project, which is matched by $12.4 million from Intel and several chip equipment makers.
The technology is renamed extreme ultraviolet (EUV) lithography, instead of the original “soft X-ray projection lithography.”
Hitachi, Nikon and a Japanese technology institute begin developing a three-mirror EUV lithography system called ETS-1, which is completed in 1998.
Intel, Motorola and Advanced Micro Devices form the U.S.-based Extreme Ultraviolet LLC consortium – aimed at demonstrating a prototype EUV lithography system. They are joined by three DOE national labs and, later, Micron, Infineon and IBM.
The EUV consortium unveils the first full-scale prototype EUV lithography machine.
French, German and Dutch companies, led by ASML, launch a European EUV consortium called MEDEA+. It aims to develop several EUV technologies, including a prototype lithography tool.
European tech companies launch the “More Moore” research project to develop better EUV light sources, optical coatings, software, microscopy, and resists.
ASML delivers the first EUV “alpha” prototype tool.
ASML produces the world’s first working full-field EUV test chips at the University of Albany.
Intel, Samsung and TSMC invest a combined $1.5 billion to help fund ASML’s EUV development program in return for minority stakes in ASML.
Samsung orders the first two “production-ready” ASML EUV scanners, for delivery in 2015.
ASML demonstrates a 250-watt EUV light source, a 10-fold output increase since 2012, and powerful enough for commercial production.
ASML ships 10 EUV systems, and vows to ship at least 20 more in 2018.
Samsung begins risk production of its 7nm EUV manufacturing process.
Tech Giants are Already Leveraging Samsung Foundry’s EUV Process Technologies
In February of 2018, Qualcomm® announced that future Qualcomm® Snapdragon™ 5G mobile chipsets will be manufactured using Samsung's 7nm LPP EUV process technology. This move will allow Qualcomm to produce a chip with a smaller footprint, giving OEMs more usable space inside upcoming products to support larger batteries or slimmer designs. Process improvements, combined with more advanced chip design, are expected to bring signiﬁcant improvements in battery life.
In December of 2018, IBM announced that they will begin manufacturing their high-performance CPU’s using Samsung's 7nm LPP EUV process technology. By leveraging this technology IBM will be positioned to drive unmatched systems performance, including acceleration, memory, and I/O bandwidth, encryption, and compression speed, as well as system scaling. The next generation of CPU’s from IBM will be a leap forward for high-performance computing speciﬁcally designed for AI.
Advanced Lithography for Next-Generation Chips
Samsung’s EUV process lets you design the industry’s fastest, most densely packed and energy-efficient system-on-chip (SOC) devices. EUV technology can also save you time and money since it requires fewer expensive and time-consuming photomasks to create the fine-pitched circuit patterns required for tomorrow’s leading-edge semiconductors.
ArF-i Multi Patterning vs. EUV Single Patterning
Gate All Around
Low Power Plus
Up to 10% higher performance or 15% lower power consumption compared to first generation 10nm process technology, 10LPE, reducing turn-around time from development to mass production for higher initial manufacturing yield.
Low Power Plus
7nm LPP is just the first stop on our EUV-enabled process technology roadmap, which in coming years will allow us to fabricate high-performance chips with features as small as 3nm
Low Power Early
The 5nm LPE process will allow more area scaling with features down to 5nm and ultra-low power use.
Low Power Early/Plus
Expected to be the last generation of fin field-effect transistor (FinFET) technology, the 4nm LPE/LPP processes will offer smaller cell size, better performance and faster manufacturing ramp ups, thanks to their easy migration path from 5nm LPE.
Gate All Around Early/Plus
Our 3GAAE/GAAP process will use a next-generation gate-all-around FET architecture, rather than FinFET, to provide improved 3nm gate control and performance.
Factory Tested and Production Ready
Samsung is investing millions of dollars to equip two new EUV manufacturing lines. These new facilities will be capable of awesomeness and highlight a benefit to Samsung partners of the world.
The EUV Revolution
Faster, more energy-efficient EUV chips will enable system makers to design new, more powerful generations of mobile devices, hyperscale and enterprise data centers, IoT devices, automotive and network equipment.
The EUV Revolution is here and you’ve got questions…
What is EUV lithography?
Extreme ultraviolet (EUV) lithography is a semiconductor industry process for producing very small integrated circuit patterns on silicon wafers using powerful laser-driven beams of light. EUV technology uses a much narrower 13.5 nanometer (nm) wavelength of light to create those patterns, less than 1/10th as wide as the 193nm light used in current leading-edge lithography processes. That allows EUV lithography tools to print much smaller, more detailed features.
Samsung’s new 7-nanometer Low Power Plus (7nmLPP) process technology is the first commercially available chip manufacturing process to use EUV lithography, which allows it to create circuits with features as small as 7 nanometers (nm). While other companies’ latest manufacturing processes can also produce 7nm chip features, their multi-patterned 193nm lithography technology is already stretched to its performance limits, and will likely not be feasible for producing much smaller chip features.
What advantages does EUV offer?
Compared to Samsung Foundry’s previous leading-edge 10nm technology, we expect our new 7LPP EUV process to provide significant benefits in power, performance, and area. Specifically, we expect chips designed for EUV production to use up to 35 percent less power while providing 10 percent higher performance and up to 40 percent better area efficiency (room to add new features). We also expect the new process to simplify manufacturing by requiring fewer processing steps and producing better yields.
EUV process technology should enable the semiconductor industry to build the next several generations of chips with ever-smaller features, while squeezing increasing amounts of functionality onto each chip. It should also reduce production costs by reducing the number of mask layers required, and taking less time to design and manufacture than traditional multi-patterned processes.
Why has EUV technology been delayed?
The semiconductor industry has been working on EUV technology for decades, but numerous obstacles needed to be overcome to make the technology both technically and economically feasible.
Until recently the biggest problem has been the plasma light sources, which needed to produce 250 watts of light in order to process at least 125 wafers per hour – the minimum level needed to make the technology cost-effective. In 2017, however, ASML removed that major area of concern by developing a more efficient way of converting laser energy to EUV light.
The industry still needs to improve the transparency of the pellicle membranes used to protect EUV wafers from contamination, as well as better photoresist materials and systems for inspecting photomasks for defects. But those advances don’t appear to be essential at this time, and aren’t likely to delay the commercial rollout of EUV technology in 2018.
How much will EUV manufacturing cost?
For EUV to be commercially successful, it will have to compete with the cost of existing lithography processes. And that won’t be easy, with EUV lithography tools expected to cost more than $100 million each. Yet despite that initial cost barrier, we expect EUV to be cost-competitive for producing chips with ultra-fine sub-10nm details.
Today’s leading-edge chip designs can use as many as 100 different masks and the same number of time-consuming exposures to reproduce the circuit patterns for a single layer of chip. EUV lithography offers a promising way to way to drastically reduce the number of mask steps, production time and, ultimately, costs required.
When and where will Samsung begin EUV chip production?
Samsung plans to start mass-producing the world’s first commercial-scale EUV chips by the end of 2018 on our new S3 manufacturing line in Hwaseong, Korea. To provide additional capacity and an alternate manufacturing source, we recently broke ground for a second EUV line in Hwaseong. The $6 billion facility should be fully equipped and ready to start production in 2020.
Who’s supplying Samsung’s EUV equipment?
Who’s planning to use EUV?
Thanks to EUV’s ability to create smaller circuit features, Qualcomm expects the chipsets to have a smaller footprint than previous designs. That, in turn, will provide more usable space inside upcoming products to support larger batteries or slimmer designs, as well as achieving significantly improved battery life.
How far can EUV lithography be extended?
Although our 7nmLPP lithography process is just reaching the market, Samsung is already working on a technology roadmap for future EUV process developments with improved performance, which should extend the usefulness of EUV lithography for at least several more generations.
By then, we plan to be using a next-generation gate-all-around FET architecture, rather than today’s prevalent fin field-effect transistor (FinFET) architecture, to produce chips with features as small as 3nm.
Samsung EUV in the News
EUV technology is available now, only from Samsung. Check out the recent news.